GitHub

mfkiwl/Matmul-FPGA-generator

The goal of this project is to create a configurable Integer Matrix Multiplier using SpinalHDL. The multiplier has 2 streaming input ports and 1 streaming output port ...
GitHub

Rahul-chhajed/Matrix-Multiplication-On-FPGA

This repository contains an FPGA matrix multiplication accelerator project with normal and Strassen-aware compute paths, simulation infrastructure, and a tested build/program flow in Vivado.
IEEE

FPGA Matrix Multiplication Optimization Using the WOS Dataflow Strategy

Abstract: Matrix multiplication is one of the most important operations in both scientific computing and deep-learning applications. However, on regular processors such as CPUs and GPUs, the ...
EDN

FPGA-based FFT engine handles four times more input data

Rodger Hosking, Vice President, Richard Kuenzler, Engineer, Pentek Inc., Upper Saddle River, N.J. For years, field-programmable gate array (FPGA) technology has been a major cornerstone of board-level ...
Design-Reuse

FPGAs: Embedded Apps : FPGA-based FFT engine handles four times more input data

Rodger Hosking, Vice President, Richard Kuenzler, Engineer, Pentek Inc., Upper Saddle River, N.J. For years, field-programmable gate array (FPGA) technology has been a major cornerstone of board-level ...
Embedded

FPGA design from the outside in

FPGAs can contain millions of logic gates yet every FPGA, regardless of the complexity of its internal design, must communicate with external devices through its I/O pins. Although this statement is ...
Electronic Design

Embedded FPGA Under the Hood

For the most part, embedded FPGA can be viewed as a “black box,” which is effectively as an RTL engine. However, sometimes it’s helpful to understand what’s going on underneath the hood to evaluate ...