Semiconductor Engineering

A Comprehensive Approach To System-Level ESD

The performance and reliability of an electronics system largely depend on the system’s immunity from an electrostatic discharge (ESD) event. Because the components, custom chips and package come from ...
Semiconductor Engineering

Shock Value

Chip-Package-System (CPS) ESD simulation enables system-wide ESD robustness validation, a common challenge in automotive and aerospace applications. To enable CPS ESD analysis requires an accurate ...
Business Wire

Apache Introduces PathFinder, the Industry’s First Full-chip ESD Physical Integrity Solution

SAN JOSE, Calif.--(BUSINESS WIRE)--Apache Design Solutions, the technology leader in power integrity and noise closure for chip-package-systems (CPS) convergence, today announced PathFinder™, a ...
Electronic Design

Is System-Level ESD Testing Valid for ICs?

Electronic system designs often include transient protection to ensure system robustness for electrostatic discharge (ESD) events. Adding external ESD protection without compromising system I/O speed, ...