Electronic Design

DFT Propels SoC IC Testing

The Design-for-Test (DFT) methodology is a strong driving force in the cost-effective testing of large-volume commodity items with very short life cycles, like system-on-chip (SoC) devices. It will ...
Semiconductor Engineering

AI Accelerator Testing Depends On DFT Innovations

Multi-die assemblies greatly increase the number of things that can go wrong, and the difficulty of finding them.
EDN

DFT Analyzer Validates Design-For-Test Features

Asset InterTech has announced its DFT Analyzer, which according to the company reduces manufacturing and test costs by validating the boundary-scan design-for-test features in a circuit-board design ...
Electronic Design

Twin DFT and Mission-Critical Safety Apps for Pre-Silicon Design Verification

The design-for-test (DFT) technology was driven by the need to harness the runaway cost of testing silicon chips on the manufacturing floor. This phenomenon eventually became close to 40% of the cost ...
Semiconductor Engineering

DFT: Essential For Power-Aware Test

Power-aware test is a major manufacturing consideration due to the problems of increased power dissipation in various test modes, as well as test implications that come up with the usage of various ...
EDN

DFT—The Easier Way to Test Analog ICs

These days, due to the ever increasing complexity of devices and the demand for better product quality, it is vital that ICs are tested as quickly and as efficiently as possible. Test engineers are ...
Business Wire

DFTView and Verdi Give DFT and Test Engineers Visibility into STIL and WGL Files

EL DORADO HILLS, Calif. & HSINCHU, Taiwan--(BUSINESS WIRE)--SpringSoft, Inc., a global supplier of specialized IC design software, and Source III, Inc., a leading supplier of test vector translation ...