Unlock the full InfoQ experience by logging in! Stay updated with your favorite authors and topics, engage with content, and download exclusive resources. Dany Lepage discusses the architectural ...
Teradyne Inc. (NASDAQ:TER) is one of the best performing S&P 500 stocks so far in 2026. On April 16, Teradyne acquired ...
Siemens Digital Industries Software today introduced Tessent™ AnalogTest software - an innovative solution that reduces pattern generation time for analog circuit tests from months to days. The ...
For over 15 years, I've been a big proponent of hierarchical test. Hierarchical test is the commonly used term for creating DFT (design-for-test) features and test patterns at lower level circuit ...
Testing digital designs usually requires one or more digital signals, some of which can be very difficult to generate. Pattern generators are specifically designed to address this problem. Whatever ...
Santa Clara, Calif.—Agilent Technologies Inc. has expanded its Universal Serial Bus (USB) test portfolio with what it is calling the industry's first automated calibration of a USB 3.0 pattern ...
How often have you struggled to verify static random-access memory (SRAM) blocks in your design? And how often, no matter how much time you spend on them, do they end up causing manufacturing issues?
Handling timing exception paths in ATPG tools while creating at-speed patterns has always been a tough and tricky task. It is well understood that at-speed testing is a requirement for modern ...
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