EDN

Building your own RISC simulator

The process of design, development and testing of a processor takes a long time, during which many models are made to fine-tune its functionality and performance. These models simulate the processor ...
Semiconductor Engineering

RISC-V Verification: The 5 Levels Of Simulation-Based Processor Hardware DV

The RISC-V open standard ISA (Instruction Set Architecture) offers developers the opportunity to configure the features and functions of a custom processor to uniquely address their target end ...
Design-Reuse

TLM 2.0 Standard into Action: Designing Efficient Processor Simulators

The increasingly growing complexity of integrated Systems-on-Chip forces the early use of simulation in order to explore the huge design space characterizing them. Simulators also enable software ...
Play Station Universe

Bus Simulator PS4 Review

After a spell on PC, the developers deemed the PS4 fit for a journey around the suburbs, and aside from the curious drop in graphical fidelity, the gameplay has arrived intact. You are thrown headlong ...
EDN

Synopsys STAR Memory System Multi-Memory Bus Processor Enables 10 Percent Die Size Reduction for Marvell SoC

Marvell achieved silicon success for networking SoC using the multi-memory bus (MMB) processor in the Synopsys DesignWare STAR Memory System for embedded test and repair Reduced area and power with a ...