EDN

Control Synthesis Output with Combinatorial Logic in Procedural Code

While it is tempting to write RTL and let the synthesis tool take over, this isn’t the best way to get the results we want. In this article, we’ll learn how to create complex combinatorial code in ...
Design-Reuse

ChipVision breakthrough ESL technology enables interactive creation of RTL code optimized for low-power consumption

Achieves up to 75 percent power savings in critical semiconductor blocks; significantly reduces development costs and design risk OLDENBURG, Germany and SAN JOSE, Calif. -- May 15, 2007 -- ChipVision ...
Semiconductor Engineering

Top Five Trends In RTL Signoff

The “shift left” of the development cycle is critical for the huge, complex chips used in such applications as AI and high-performance computing (HPC). Identifying design issues at the netlist stage ...
Semiconductor Engineering

Balancing Leakage Reduction with Correctness Preservation in RTL Code Generation (Univ. of Central Florida)

A new technical paper titled “CircuitGuard: Mitigating LLM Memorization in RTL Code Generation Against IP Leakage” was published by researchers at University of Central Florida. “Large Language Models ...
Design-Reuse

Jasper Releases Two Property Synthesis Apps Targeted at Early RTL Qualification and Coverage-Driven RTL Verification

October 29, 2012, MOUNTAIN VIEW, Calif. – Jasper Design Automation, the leading provider of verification solutions based on state-of-the-art formal technology, has announced the availability of two ...