Design-Reuse

Xilinx ISE Design Suite 12.3 Introduces AMBA 4 AXI4 IP Cores, Enhances PlanAhead Design and Analysis Cockpit, Extends Power Optimization

Release of ISE Design Suite 12.3 Begins Roll-Out of IP Supporting AXI4 interfaces for Plug-and-Play FPGA Design SAN JOSE, Calif., Oct 05, 2010 --Xilinx, Inc. (Nasdaq: XLNX) today announced the release ...
Design-Reuse

Xilinx Releases 16 new parameterizable cores on IP Center for Virtex Series

SAN JOSE, Calif.----Nov. 30, 1999-- Xilinx, Inc. (NASDAQ: XLNX), today announced the availability of over 50 LogiCORE(TM) and AllianceCORE(TM) products and reference design for its Virtex-E and Virtex ...
EDN

Xilinx ISE Design Suite 13.2 Steps Up Designer Productivity and Brings Partial Reconfiguration to Kintex-7, Virtex-7 FPGAs

The award-winning ISE Design Suite provides designers the tools they need to facilitate global-team design, rapid feedback on key design considerations, best practices for low-power optimization using ...
CIOL

Xilinx expands FEC IP core for better network

BANGALORE, INDIA: To include GFEC eFEC and high gain FEC (xFEC) solutions, Xilinx expanded its Forward Error Correction (FEC) IP core. These solutions are used to ...
EDN

Xilinx and VSofts Demonstrate Low Latency Real-Time H.264/AVC-I IP Core Compression Solution for Xilinx FPGAs

AMSTERDAM, Sept. 10 /PRNewswire/ — Xilinx®, Inc. (Nasdaq: XLNX) and Vanguard Software Solutions, Inc. (VSofts) today demonstrated at the IBC2010 conference the ability of VSofts' H.264/AVC-I IP core ...
Yahoo Finance

IntelliProp SATA 6Gb/s Host Core Certified on Xilinx Kintex-7(R) FPGA

LONGMONT, CO--(Marketwired - June 03, 2014) - IntelliProp Inc announced today that their SATA 6Gb/s Host Intellectual Property (IP) Core has passed certification by the University of New Hampshire ...