Design-Reuse

FPGA Implementation of DLX Microprocessor With WISHBONE SoC Bus

DLX is an open source microprocessor, it’s free and it has never been implemented in a commercial ASIC (Application Specific Integrated Circuit) design. The objective of this project is to use the ...
Design-Reuse

Understanding FPGAs – From Architecture to SoC, RFSoC, and Embedded FPGA Technologies

One of the most crucial components of modern digital systems, field programmable gate arrays (FPGAs) provide for flexibility, parallel processing, and hardware-level acceleration. FPGAs, in contrast ...
Electronic Design

Secure FPGA RISC-V SoC Forgoes Heatsink

How a cool FPGA needs so little power. The importance of a smaller RISC-V SoC FPGA. What the PolarFire SoC means to RISC-V developers. Why security and reliability are key to PolarFire’s success. Very ...
Electronic Design

Solutions Mitigate Mixed-Signal SoC Implementation Headaches

The concept of silicon realization, as defined in the Cadence EDA360 vision paper, represents everything required to produce a system-on-a-chip (SoC) design in silicon. 1 Silicon realization addresses ...
EDN

FPGA-based rapid prototyping of ASIC, ASSP, and SoC designs

ASIC designs continue to increase in size, complexity, and cost (for the purpose of these discussions, the term ASIC is assumed to encompass ASSP and SoC devices). At the same time, aggressive ...
Semiconductor Engineering

Adding NoCs To FPGA SoCs

FPGA SoCs straddle the line between flexibility and performance by combining elements of both FPGAs and ASICs. But as they find a home in more safety- and mission-critical markets, they also are ...
EDN

Design planning for large SoC implementation at 40nm: Guaranteeing predictable schedule and first-pass silicon success

The physical design implementation of large complex deep sub-micron technologies has evolved to a stage where it is essential to consider every aspect of SoC design and implementation during the ...